In general, liquid crystal display (LCD) devices use the optical anisotropy and polarization properties of liquid crystal molecules in a liquid crystal layer to display images. Since the liquid crystal molecules have thin and long shapes, the polarization of light through the liquid crystal molecules varies with the alignment direction of the liquid crystal molecules. Accordingly, the LCD device displays an image by controlling the alignment of the liquid crystal molecules as well as the transmittance of light through the liquid crystal layer due to adjustment of the electric field applied to the liquid crystal layer. Active matrix liquid crystal display (AM-LCD) devices where thin film transistors (TFTs) and pixel electrodes are disposed in matrix have been the subject of recent researches because of their superiority in displaying moving images and high contrast ratio.
FIG. 1 is a cross-sectional view showing an array substrate for a liquid crystal display device according to the related art. In FIG. 1, a gate electrode 25 extending from a gate line (not shown) is formed on a substrate 10. A gate insulating layer 45 is formed on the gate electrode 25 and a semiconductor layer 42 is formed on the gate insulating layer 45 over the gate electrode 25. The semiconductor layer 42 includes an active layer of intrinsic amorphous silicon (a-Si:H) and an ohmic contact layer 41 of impurity-doped amorphous silicon (n+a-Si:H). In addition, source and drain electrodes 32 and 34 are formed on the semiconductor layer 42. The source electrode 32 extends from a data line (not shown) and the drain electrode 34 is spaced apart from the source electrode 32. The data line crosses the gate line to define a pixel region PA. A passivation layer 55 is formed on the source and drain electrodes 32 and 34, and a pixel electrode 70 is formed on the passivation layer 55. The passivation layer 55 includes a drain contact hole CH1 exposing the drain electrode 34, and the pixel electrode 70 is connected to the drain electrode 34 through the drain contact hole CH1.
The gate electrode 25, the gate insulating layer 45, the semiconductor layer 42, the source electrode 32 and the drain electrode 34 constitute a thin film transistor (TFT) T. The ohmic contact layer 41 is formed to correspond to the source and drain electrodes 32 and 34, and a portion of the active layer 40 exposed through the ohmic contact layer 41 is used as a channel region ch of the TFT T. When a gate signal of an OFF voltage level is applied to the gate electrode 25, the source and drain electrodes 32 and 34 are electrically disconnected and the TFT T is turned off. When a gate signal of an ON voltage level is applied to the gate electrode 25, the source and drain electrodes 32 and 34 are electrically connected and the TFT T is turned on. Accordingly, a data signal is applied to the pixel electrode 70 through the channel region ch. Further, liquid crystal molecules in a liquid crystal layer are re-arranged by an electric field generated between the pixel electrode 70 and a common electrode (not shown) so that the LCD device displays images.
The gate insulating layer 45 may be formed by a chemical vapor deposition (CVD) method using an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiO2). Since the gate insulating layer 45 of the inorganic insulating material has an excellent interface property with the semiconductor layer 42, a mobility of charges passing through the channel region ch is improved. However, since the gate insulating layer 45 of the inorganic insulating material is formed by the CVD method, a production cost increases due to high price of a CVD apparatus and a fabrication time increases due to the CVD method using vacuum condition.